LAN969x SPI
1. SoC Resources
LAN969X SoC have 4 FLEXCOMs (Flexible Serial Communication Controller). In order to use flexcom SPI interface, a specific flexcom should be configured in SPI mode.
2. Kernel configurations
Following kernel config options should be enabled to use LAN969x flexcom SPI interface:
-
CONFIG_SPI_ATMEL
- SPI driver config option. -
CONFIG_MTD
,CONFIG_MTD_SPI_NOR
orCONFIG_MTD_SPI_NAND
based on NOR/NAND flash present.
3. Devicetree Configuration
To use Flexcom SPI interface, following configurations are required in device tree.
-
Each of the flexcom flx0, flx1, flx2 and flx3 nodes can be configured in SPI mode
ATMEL_FLEXCOM_MODE_SPI
to use SPI interface. -
compatible
string must be set toatmel,at91rm9200-spi
. -
reg
property must be set with register address and length as<0x400 0x200>
. -
GPIO pins for TXD, RXD and SCK should be configured to
pinctrl-0
property. Also addcs0
andcs1
pins, if present. List of possible pin mappings are as in below table:
FLEXCOM ID | ALT Mode | SCK pin | RXD pin | TXD pin |
---|---|---|---|---|
flx0 |
ALT 2 |
GPIO2 |
GPIO3 |
GPIO4 |
flx2 |
ALT 3 |
GPIO14 |
GPIO15 |
GPIO16 |
flx1 |
ALT 2 |
GPIO27 |
GPIO28 |
GPIO29 |
flx3 |
ALT 2 |
GPIO54 |
GPIO55 |
GPIO56 |
flx2 |
ALT 1 |
GPIO64 |
GPIO65 |
GPIO66 |
-
interrupts
property must set with interrupt details. Interrupt number[CPU INTR] corresponding to a flexcom must be configured as defined in below table:
FLEXCOM ID | Shared Peripheral Interrupt | CPU INTR |
---|---|---|
flx0 |
78 |
46 |
flx1 |
79 |
47 |
flx2 |
80 |
48 |
flx3 |
81 |
49 |
Note that Shared peripheral interrupt lines start at index ID32. So, CPU INTR must be calculated as [Shared peripheral interrupt number - 32].
-
Input clock
clocks
property must be set to&fabric_clk
. Note that Fabric clock (250Mhz) is clock used by AXI, AHB fabric and APB bridges which connects all th peripherals. -
clock-names
must be set tospi_clk
. -
dmas
must be set to phandledma0
and Peripheral ID as listed below:
FLEXCOM ID | Tx channel PerID | Rx channel PerID |
---|---|---|
flx0 |
3 |
2 |
flx1 |
3 |
2 |
flx2 |
7 |
6 |
flx3 |
9 |
8 |
3.2. Example
Following example explains how a flexcom SPI should be defined in DT to use a DPLL device.
&flx2 { atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; status = "okay"; spi2: spi@400 { pinctrl-0 = <&fc2_pins>; pinctrl-names = "default"; cs-gpios = <&gpio 63 GPIO_ACTIVE_LOW>; status = "okay"; spi@0 { compatible = "mchp,synce_dpll"; reg = <0>; spi-max-frequency = <8000000>; }; }; }; &gpio { fc2_pins: fc2-pins { pins = "GPIO_64", "GPIO_65", "GPIO_66"; function = "fc"; };