LAN969x
1. LAN969x Family overview
The LAN969x product consists of 4 product families:
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LAN969x-XX family with basic switch support
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LAN969x-XX-VAO family with automotive features added
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LAN9691, LAN9692, LAN9693
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LAN969x-XX-TSN family with industrial features added
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LAN969x-XX-RED family with redundancy features added
The XX in the above list is selected from this list:
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100 Gbps switch capacity: LAN9698 / LAN9693
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60 Gbps switch capacity: LAN9696 / LAN9692
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40 Gbps switch capacity: LAN9694 / LAN9691
2. Memory map
The table below show the relevant areas of physical memory for the LAN969x. Please note that off-chip resources such as flash and DDR, depends on board design, so you must also check the schematics.
Name On-Chip Start Max size Size eval board ======= ======= ========== ==================== =================== BOOTROM Yes 0x00000000 0x00014000 (80KB) 0x00014000 (80KB) SRAM Yes 0x00100000 0x00200000 (2MB) 0x00200000 (2MB) QSPI0-NOR No 0x20000000 0x10000000 (256MB) 0x2000000 (2MB) DDR No 0x60000000 0x80000000 (2048MB) 0x80000000 (2048MB)
3. EVB Overview:
This chapter describes the different LAN969x Reference Boards.
3.1. EVB-LAN9696-24port
The EVB-LAN9696-24port is a 24 port evaluation board with 4 x 10GE SFP+ uplinks.
![EVB LAN9696 24port](../_images/EVB-LAN9696-24port.png)
The board features:
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LAN9696 66G TSN switch with PRP/HSR redundancy
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24 x 1000BASE-T ports using 6 x LAN8814 PHYs via Q-USGMII (PCH/MCH)
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4 x 10G SFP+ ports directly connected to LAN9696
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1 x 1000BASE-T Network management port using LAN8840 RGMII PHY
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Internal CPU running Linux/IStaX/SwitchDev/MESA
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Local management via USB2 serial port
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USB3343 ULPI USB transceiver for USB host interface
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Option for external CPU via PCIe cable or SPI
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Option for MCHP IEEE 802.3bt/UPoE add-on modules (EV14Y36A using PD69208T4, PD69210, IEEE 802.3af/at/bt Type 4 standard compliant)
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ZL80732C (Azurite) Sync-E/PTP clock synchronizer with reference clocks
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1GB DDR4 x16 RAM.
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SST26WF016B QSPI NOR boot flash
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4GB eMMC NAND flash.
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MCP2200 USB UART (USB powered) – with reset and boot mode control options
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10-pin 0.05” pitch pin header for JTAG/debug
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1 x RJ45 for 1000BASE-T local management
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2x SMA connectors for PTP IN/OUT
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2x SMA connectors for Station clock in/out
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2 x RJ45 connectors for RS422 Time interface in/out
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PCIe 1x cable connector (Oculink)
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40-pin 0.1” expansion pin header.
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DIP switch for strapping bits (for recovery mode etc)
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Reset button
3.2. EVB-LAN9698-10port
The EVB-LAN9698-10port is a 10 port evaluation board with 10 x 10GE SFP+ uplinks.
![evb lan9698 10port](../_images/evb-lan9698-10port.png)
These are the board features:
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LAN9698RED 100G TSN switch with PRP/HSR redundancy
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10 x SFP+ directly connected to LAN9698
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1 x 1000BASE-T Network management port using LAN8840 RGMII PHY
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Internal CPU running Linux/IStaX/SwitchDev/MESA
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Local management via USB2 serial port
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USB3343 ULPI USB transceiver for USB host interface
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Option for external CPU via PCIe cable or SPI
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ZL80732 (Azurite) Sync-E/PTP clock synchronizer with reference clocks
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1GB DDR4 x16 RAM.
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SST26WF016B QSPI NOR boot flash
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4GB eMMC NAND flash.
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MCP2200 USB UART (USB powered) – with reset and boot mode control options
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10-pin 0.05” pitch pin header for JTAG/debug
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1 x RJ45 for 1000BASE-T local management
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2x SMA connectors for PTP IN/OUT
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2x SMA connectors for Station clock in/out
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2 x RJ45 connectors for RS422 Time interface in/out
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PCIe 1x cable connector (Oculink)
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40-pin 0.1” expansion pin header.
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DIP switch for strapping bits (for recovery mode etc)
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Reset button
3.3. EVB-LAN9692-LM
The EVB-LAN9692-LM is 11 port evaluation board with 7 MATEnet connectors and 4 SFP+.
The board is without any DRAM as it is designed with VelocityDrive (LMStaX)/Confort management in mind because VelocityDrive will run within LAN9692 in its 2MB internal memory.
You cannot run IStaX/Linux on this board. |
![evb lan9692 lm](../_images/evb-lan9692-lm.png)
The board features:
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LAN9692 (Laguna) 66G TSN switch.
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4x 10G SFP+ ports directly connected to LAN9692.
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7x 1000Base-T1 MATEnet ports using LAN8870 PHY.
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1x 1000BASE-Tx Network management port using LAN8840 RGMII PHY
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Internal CPU running VelocityDrive SP (LMStaX).
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Local management via USB-C serial port, when using U-boot and Secure Boot Manager.
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2x SMA connector for PTP IN/OUT.
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SST26WF064B QSPI NOR boot Flash, 8MB
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IS21ES04G-JQLI NAND Flash, eMMC type, 4GB
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USB-C connector using MCP2200 UART to USB2 for local Management.
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Oculink PCIe connector for external CPU management.
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2x5-pin, 0.05” pitch, header for JTAG/Debug.
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40-pin 0.1” expansion pin header.
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Reset button
4. Board Name Overview
The name used in the device trees for the Linux Kernel is the board order no, as this has been created at a very early stage of the project.
To allow you to move between the different names that are in use, you can use the table found below:
Internal Board Name | Board Order No | Board Name |
---|---|---|
UNG8398 |
EV23x71a |
EVB-LAN9696-24port |
UNG8422 |
EV89P81a |
EVB-LAN9698-10port |
UNG8420 |
EV09P11a |
EVB-LAN9692-LM |